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cisreg.h

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00001 /*
00002  * cisreg.h 1.11 1998/09/11 08:54:47
00003  *
00004  * The contents of this file are subject to the Mozilla Public License
00005  * Version 1.0 (the "License"); you may not use this file except in
00006  * compliance with the License. You may obtain a copy of the License
00007  * at http://www.mozilla.org/MPL/
00008  *
00009  * Software distributed under the License is distributed on an "AS IS"
00010  * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See
00011  * the License for the specific language governing rights and
00012  * limitations under the License. 
00013  *
00014  * The initial developer of the original code is David A. Hinds
00015  * <dhinds@hyper.stanford.edu>.  Portions created by David A. Hinds
00016  * are Copyright (C) 1998 David A. Hinds.  All Rights Reserved.
00017  */
00018 
00019 #ifndef _LINUX_CISREG_H
00020 #define _LINUX_CISREG_H
00021 
00022 /* Offsets from ConfigBase for CIS registers */
00023 #define CISREG_COR      0x00
00024 #define CISREG_CCSR     0x02
00025 #define CISREG_PRR      0x04
00026 #define CISREG_SCR      0x06
00027 #define CISREG_ESR      0x08
00028 #define CISREG_IOBASE_0     0x0a
00029 #define CISREG_IOBASE_1     0x0c
00030 #define CISREG_IOBASE_2     0x0e
00031 #define CISREG_IOBASE_3     0x10
00032 #define CISREG_IOSIZE       0x12
00033 
00034 /*
00035  * Configuration Option Register
00036  */
00037 #define COR_CONFIG_MASK     0x3f
00038 #define COR_MFC_CONFIG_MASK 0x38
00039 #define COR_FUNC_ENA        0x01
00040 #define COR_ADDR_DECODE     0x02
00041 #define COR_IREQ_ENA        0x04
00042 #define COR_LEVEL_REQ       0x40
00043 #define COR_SOFT_RESET      0x80
00044 
00045 /*
00046  * Card Configuration and Status Register
00047  */
00048 #define CCSR_INTR_ACK       0x01
00049 #define CCSR_INTR_PENDING   0x02
00050 #define CCSR_POWER_DOWN     0x04
00051 #define CCSR_AUDIO_ENA      0x08
00052 #define CCSR_IOIS8      0x20
00053 #define CCSR_SIGCHG_ENA     0x40
00054 #define CCSR_CHANGED        0x80
00055 
00056 /*
00057  * Pin Replacement Register
00058  */
00059 #define PRR_WP_STATUS       0x01
00060 #define PRR_READY_STATUS    0x02
00061 #define PRR_BVD2_STATUS     0x04
00062 #define PRR_BVD1_STATUS     0x08
00063 #define PRR_WP_EVENT        0x10
00064 #define PRR_READY_EVENT     0x20
00065 #define PRR_BVD2_EVENT      0x40
00066 #define PRR_BVD1_EVENT      0x80
00067 
00068 /*
00069  * Socket and Copy Register
00070  */
00071 #define SCR_SOCKET_NUM      0x0f
00072 #define SCR_COPY_NUM        0x70
00073 
00074 /*
00075  * Extended Status Register
00076  */
00077 #define ESR_REQ_ATTN_ENA    0x01
00078 #define ESR_REQ_ATTN        0x10
00079 
00080 /*
00081  * CardBus Function Status Registers
00082  */
00083 #define CBFN_EVENT      0x00
00084 #define CBFN_MASK       0x04
00085 #define CBFN_STATE      0x08
00086 #define CBFN_FORCE      0x0c
00087 
00088 /*
00089  * These apply to all the CardBus function registers
00090  */
00091 #define CBFN_WP         0x0001
00092 #define CBFN_READY      0x0002
00093 #define CBFN_BVD2       0x0004
00094 #define CBFN_BVD1       0x0008
00095 #define CBFN_GWAKE      0x0010
00096 #define CBFN_INTR       0x8000
00097 
00098 /*
00099  * Extra bits in the Function Event Mask Register
00100  */
00101 #define FEMR_BAM_ENA        0x0020
00102 #define FEMR_PWM_ENA        0x0040
00103 #define FEMR_WKUP_MASK      0x4000
00104 
00105 #endif /* _LINUX_CISREG_H */

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